The video features a discussion with Sassine Ghazi, CEO of Synopsys, at their annual conference, Synopsys Converge, focusing on the evolving landscape of chip design tools. Ghazi highlights the increasing complexity of chip design, driven by advancements such as GPU compute and machine learning, noting that modern chips are often designed with significant AI assistance. He explains that while traditional chip design followed Moore’s Law, today’s challenges require new approaches like advanced packaging and multi-die integration, demanding sophisticated electronic design automation (EDA) tools and extensive intellectual property (IP) portfolios to meet performance and power requirements.
Ghazi elaborates on Synopsys’s role in enabling the chiplet era, where chips are no longer monolithic but composed of multiple interconnected components. He describes their 3D IC Compiler technology, which helps architects optimize chip design by analyzing trade-offs between different technology nodes and packaging methods. This approach addresses the complexity of heterogeneous integration, including thermal and mechanical challenges, which led Synopsys to acquire Ansys to enhance their multiphysics simulation capabilities. The integration of physics models into the design process allows for precise co-design, avoiding costly overdesign while ensuring reliability under specific workloads.
The conversation also touches on the collaboration between Synopsys and foundries, including new entrants like Rapidus in Japan. Ghazi emphasizes the importance of close partnerships with foundries to align EDA tools and IP with evolving process technologies, from early R&D stages through production. Although working with a new foundry presents challenges, Synopsys leverages its extensive experience and technology to accelerate development. This collaboration ensures that Synopsys remains a leader in providing process-node-agnostic solutions that support customers across various manufacturing platforms.
Looking ahead, Ghazi discusses the transformative potential of AI in chip design workflows. Synopsys has been integrating reinforcement learning and other AI techniques into their tools since 2017, aiming to create “agent engineers”—autonomous AI agents that manage design tasks and dynamically orchestrate complex workflows. This multi-agent adaptive orchestration system enables exploration of vast design spaces beyond human capability, accelerating innovation and optimizing outcomes. Partnerships with companies like Microsoft and Nvidia support the development of cognitive layers that enhance AI-driven design processes without replacing human engineers.
In summary, the interview underscores the rapid evolution of chip design driven by increasing complexity, new architectural paradigms, and AI integration. Synopsys positions itself as a critical enabler in this ecosystem by providing advanced EDA tools, broad IP portfolios, and cutting-edge multiphysics simulation. Their proactive collaboration with foundries and investment in AI technologies aim to reduce time-to-market and address emerging challenges in heterogeneous integration and advanced packaging. The future of chip design, according to Ghazi, lies in leveraging AI-driven automation and sophisticated modeling to meet the demands of next-generation semiconductor innovation.
