Anna Goldie and Azalia Mirhoseini of Recursive Intelligence discuss using AI to automate and optimize chip design, creating faster, more efficient, and customized chips through a self-improving loop between AI and hardware. Their approach significantly accelerates design processes, democratizes chip creation for diverse workloads, and promises transformative improvements in AI chip performance and scalability.
The video features Anna Goldie and Azalia Mirhoseini, co-creators of AlphaChip at Google, discussing their new company, Recursive Intelligence, which focuses on using AI to revolutionize chip design. They emphasize that chips are the essential fuel for AI, and their goal is to leverage AI to optimize and automate the chip design process, creating a self-improving loop between AI and its physical hardware. Their initial work with AlphaChip demonstrated that deep reinforcement learning agents could generate superhuman chip layouts, which have been successfully used in multiple generations of Google’s TPU chips and adopted by other companies like MediaTek.
Recursive Intelligence envisions its development in three phases. The first phase aims to accelerate the chip design process by automating two major bottlenecks: physical design (placement and routing of billions of components) and design verification, both of which currently require extensive human expertise and time. The second phase focuses on democratizing chip design by creating a platform that can design custom hardware tailored to specific workloads, enabling companies without large chip design teams to benefit from specialized chips. The final phase involves vertical integration, where Recursive would design and build its own chips and AI models, co-evolving them to deliver unmatched performance and cost efficiency.
The company’s approach involves redesigning traditional chip design tools to be vastly faster—up to 100,000 times faster—making them suitable for AI-driven optimization loops. For example, they have developed a static timing analysis engine that correlates highly with commercial tools but operates a thousand times faster, enabling rapid iteration and learning by AI agents. This co-design and automation approach unlocks significant improvements in chip performance and reduces time to market, potentially transforming the chip design industry into a “designless” era, analogous to the fabless manufacturing model enabled by companies like TSMC.
Anna and Azalia highlight the potential for a Cambrian explosion of customized chips tailored to diverse AI workloads, ranging from large frontier models to low-power or high-throughput applications. This customization is critical as the demand for AI performance grows exponentially, and off-the-shelf chips may no longer suffice. Their team uniquely combines experts in large language models and chip design, enabling them to tackle the complex challenges of integrating AI with hardware design effectively.
In the Q&A, they discuss the distinctive organic, curved chip layouts generated by their AI models, which differ from the regular, aligned placements typically made by human designers and offer performance benefits. They also address concerns about the cost and scalability of producing many specialized chips, explaining that their approach leverages compute to reduce design time and improve performance, making customization economically viable at scale. Even small improvements in chip efficiency can translate into massive gains for large-scale AI workloads, underscoring the value of their AI-driven chip design platform.