The video features Dr. Krste Asanović discussing the origins and growth of RISC-V, an open-source instruction set architecture developed to provide a flexible, modifiable alternative to proprietary ISAs like x86 and ARM. He explains how RISC-V’s openness, modularity, and the formation of RISC-V International have driven its global adoption, while companies like SiFive support its commercial ecosystem and address challenges such as fragmentation and compliance.
The video features an in-depth interview between Ian and Dr. Krste Asanović, co-founder of SiFive and a key architect behind the RISC-V instruction set architecture (ISA). They begin by discussing the landscape of processor architectures, highlighting the dominance of x86 (with its limited licensing), ARM (widely licensed but proprietary), and the emergence of RISC-V as an open-source alternative. Dr. Asanović recounts his long history in computer architecture, emphasizing the excitement and constant evolution in the field, and sets the stage for the story of RISC-V’s creation.
Dr. Asanović explains that RISC-V was born out of necessity during his time at UC Berkeley, where he and his students needed a flexible, modifiable ISA for research and teaching. Existing ISAs like MIPS and ARM were either not open or too restrictive for academic sharing and modification. The team decided to create a clean-slate, open ISA that would be simple enough to support a C compiler and extensible for future research needs. This modularity and openness quickly attracted attention beyond Berkeley, as researchers and engineers worldwide began using and contributing to RISC-V.
As RISC-V gained traction, the team realized the need for a formal standards body to manage its development and prevent fragmentation. This led to the formation of RISC-V International, a foundation dedicated solely to maintaining the open standard, not to providing IP or implementations. Dr. Asanović emphasizes that, unlike Linux, RISC-V International does not distribute cores or code, but rather focuses on the specification and compliance, ensuring that anyone can freely access and implement the standard.
The conversation shifts to the commercial ecosystem, particularly the founding and evolution of SiFive. Initially, SiFive aimed to build custom silicon rather than IP, but overwhelming demand from industry for RISC-V cores led them to pivot toward providing IP and supporting the broader ecosystem. SiFive’s early development boards and chips played a crucial role in seeding the RISC-V ecosystem, enabling rapid software porting and community growth. The company now works with major semiconductor manufacturers across various markets, from embedded to data center applications, and continues to iterate on high-performance core designs.
Finally, the interview addresses challenges such as fragmentation, compliance, and time-to-market for new cores. Dr. Asanović argues that RISC-V’s modularity and the establishment of standardized profiles (like RVA23) help balance flexibility with interoperability, countering criticisms of fragmentation. He acknowledges the need for robust compliance suites and ongoing industry collaboration. Dr. Asanović concludes by expressing his passion for building machines and solving design problems, noting that while he misses the academic environment, he remains closely connected to research and education through ongoing collaborations.